Analog ESD Lead/Manager – Advanced Technology Development

Job description

**What if your ESD expertise shaped the protection architecture of every analog chip TI ships — from precision sensors to automotive power ICs?** At Texas Instruments, ESD isn't an afterthought — it's a **core design discipline** that determines whether a chip survives the real world. We're looking for an exceptional **Analog ESD Lead/Manager** to bring technical authority, team leadership, and continuous innovation to one of the most specialized domains in semiconductor design. **Your protection structures. Your design guidelines. Your team. Global silicon impact.** **🔭 About the Role** You'll join TI's **ESD Team within Advanced Technology Development** — a specialized group of experienced engineers providing technical leadership and state‑of‑the‑art design infrastructure across **all TI business units** . Working across TI's industry‑leading analog portfolio — **precision analog, power management, imaging, audio, high‑speed converters, and interface applications** — you'll gain exposure to diverse technologies from **deep‑submicron analog CMOS to high‑voltage BiCMOS** , while collaborating cross‑functionally with process engineering, packaging, testing, reliability, and manufacturing teams. This is not a support role. This is a **technical leadership position** where your decisions directly influence silicon robustness, customer qualification outcomes, and the reliability of TI's global product portfolio. 💡 *Your ESD innovations will protect chips deployed in billions of devices worldwide.* **🛠️ Key Responsibilities** - **Lead, mentor, and train** a local team of Analog ESD Product Specialists to ensure the highest level of product support quality - **Establish and enforce** consistent ESD development, design, verification, validation, and troubleshooting methodologies across the team - Serve as the **primary technical point of contact** for all ESD‑related issues, queries, and escalations from local business units - Maintain **continuous alignment with all stakeholders** (design, product, process, reliability) in support of product design goals - **Design, develop, and implement ESD protection structures** for analog products spanning CMOS and BiCMOS technologies - Conduct **ESD design reviews** and troubleshoot failures in internal and customer qualification programs - Support **design and development of ESD test structures** for technology assessments and new node characterization - Maintain and evolve **ESD protection libraries** and design‑guideline documentation for TI engineers and I/O cell developers - Drive **continuous improvement** in ESD protection effectiveness, area efficiency, and design methodology - Collaborate directly with **internal and external customers** on ESD‑related product and qualification challenges **✅ Required Skills** - **Ph.D. in Electrical Engineering (10+ years ESD experience)** OR **M.S. in Electrical Engineering (15+ years ESD experience)** - Deep expertise in **analog ESD design** across CMOS and high‑voltage BiCMOS technology nodes - Strong understanding of: - **Analog and digital circuit operation** at transistor level - **High‑current device physics** — diodes, resistors, BJTs, SCRs, FETs - **CMOS and analog silicon process flows** - **High‑voltage ESD design (>20V)** - Proven experience **managing a team** of ESD Product Specialists - Hands‑on experience working with **internal and external customers** on ESD qualification issues - Excellent **lab and characterization skills** — TLP, HBM, CDM, IEC‑61000 testing - **Self‑directed, detail‑oriented** , and capable of managing multiple concurrent projects - Outstanding **verbal and written communication** skills **🌟 Preferred Qualifications** - Experience with **ESD protection across diverse analog domains** — precision, power management, high‑speed converters, audio, imaging - Familiarity with **deep‑submicron CMOS nodes** (28nm and below) and advanced ESD challenges - Background in **ESD test structure design** and technology‑level characterization - Knowledge of **ESD industry standards** — JEDEC, ESDA, AEC‑Q100 - Prior experience building or expanding **ESD protection IP libraries** - Track record of **patent contributions** in ESD protection or device physics - Experience with **failure analysis** and cross‑functional reliability investigations **🏆 Why You'll Love Working Here** 🌐 **Enterprise‑wide impact** Your ESD libraries and guidelines protect chips across ALL TI business units globally 🔬 **Technology breadth** Work across precision analog, power‑management, imaging, audio, HSD converters, BiCMOS, and deep‑submicron CMOS 💡 **Innovation culture** A team that continuously pushes ESD protection methodology forward 📈 **Dual growth path** Clear trajectory in both technical leadership (fellow/principal) and management tracks 💰 **Competitive total rewards** Market‑leading salary, performance bonus, ESPP, and premium benefits 🤝 **Collaborative culture** Work alongside PhDs, process engineers, reliability experts, and globally recognized ESD specialists **📣 Call‑to‑Action** If you're a seasoned ESD engineer who wants to **lead a specialized team, shape protection architectures across TI's entire analog portfolio, and leave a lasting mark on semiconductor reliability** — this is your platform. **Apply now**