CPU Hardware Verification (Power Management), Staff

Job description

## **Company:** Qualcomm India Private Limited ## **Job Area:** Engineering Group, Engineering Group > Hardware Engineering **General Summary:** **Role Overview** We are seeking a highly motivated and technically strong **Staff Engineer** to drive end-to-end verification of next-generation **CPU Co-Processor (CPUCP/PDP) Power Management firmware and hardware features** . This role requires deep expertise in SystemVerilog-based verification, power management validation, and cross-functional leadership across Firmware, RTL Design and Post-Silicon teams. The ideal candidate will own verification strategy from architecture definition through signoff, driving quality, scalability, automation, and execution excellence across CPU programs. **Minimum Qualifications:** - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. **Key Responsibilities** - Lead the **end-to-end verification** of CPUCP/PDP firmware-driven hardware features, with a focus on Power Management, Reliability, and System Readiness. - Architect and develop **robust SystemVerilog/UVM testbenches, transactors, checkers, and verification infrastructure** for complex SoC subsystems. - Drive verification of AMBA-based system IPs including **timers, mailbox, interrupts, and interconnect fabrics (NoC)** . - Own verification planning, test strategy, coverage modeling, coverage closure, and functional signoff. - Define and implement comprehensive validation for power-management features such as **DVFS, Low Power Modes (LPM), clock/power transitions, and firmware-controlled sequences** . - Lead complex debug and root-cause analysis across **Firmware, RTL, Design, Emulation, and Post-Silicon teams** . - Develop reusable stimulus frameworks, automation solutions, debug utilities, dashboards, and productivity tools to improve execution efficiency and scalability. - Support platform bring-up, SoD readiness, feature qualification, HW/FW release validation, and silicon readiness activities. - Influence architecture reviews and verification methodologies, ensuring best practices are consistently applied across programs. - Mentor junior engineers and foster a culture of technical excellence, ownership, and innovation. - Drive cross-functional initiatives spanning Firmware, Hardware Design, Emulation, and Post-Silicon Verification teams. **Required Qualifications** - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field . - Extensive experience in **SoC, CPU or Power-Management verification** environments. - Strong expertise in **SystemVerilog/UVM, verification methodologies** , **and testbench architecture** . - Proven experience developing **NoC transactors, protocol checkers, and verification infrastructure** . - Deep understanding of **AMBA protocols** and system-level IPs such as timers, mailboxes, interrupts, and memory-mapped peripherals. - Strong background in **RTL simulation, emulation, waveform analysis, debug methodologies, and coverage closure** . - Experience validating power-management technologies including **DVFS, LPM, idle states, power sequencing, and reset flows** . - Proficiency in **C/C++, SystemVerilog, Python** , scripting, automation, and data-driven verification workflows. - Strong analytical and debugging skills with the ability to diagnose issues across HW, FW, and system domains. - Demonstrated ability to lead technical discussions, influence verification strategy, and drive execution across geographically distributed teams. - Added Advantage: Power Aware verification and Gate level simulation Hands – On experience **Pre** **ferred Qualifications** - **10–12+ years of industry experience** in CPU, GPU, SoC, or complex subsystem verification. - Proven expertise in **pre-silicon verification methodologies** , testbench architecture, and verification infrastructure development. - Strong track record of delivering verification signoff for complex SoC features from architecture definition through silicon bring-up. - Hands-on experience with automation frameworks,, regression infrastructure, and CI/CD verification workflows. - Knowledge of system level Power management scenarios. - Previous experience mentoring engineers and leading cross team technical initiatives across organizations. **Why Join Us** You will play a critical role in shaping the verification strategy, building Testbench architecture for next-generation CPU platforms, driving hardware quality, influencing architecture decisions, and enabling successful silicon delivery through innovative verification methodologies and automation. **Applicants** : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security