DFT Engineer

Job description

- Proven working experience in Stuck-At, Compression, ATPG, BSCAN/JTAG schemes implementation & verifications. - Full Chip DFT implementation & verification tasks & developing flows. - Should have handled full chip-level & hierarchical Scan insertion with Compression Techniques(DFTMax/Ultra). - Hands on experience with Synopsys DFT tools & flows. - Good Knowledge of cross-functional domains(SYN, LEC, STA, PD) understanding with owner ship of constraints developments and LEC. - Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process. - Interface with front-end ASIC teams to resolve issues.