Memory Layout Engineer

Job description

**#Hiring** : Memory Layout & IO Layout Engineers | Bangalore Tech Mahindra is hiring experienced **Memory Layout** and **IO Layout Engineers** for advanced-node semiconductor projects. **#RequiredExperience** **4–8 years** of relevant experience Strong preference for candidates with **4–6 years** of experience Preferred Technology Nodes Hands-on experience in **TSMC and/or Samsung advanced technology nodes 2,3 nm** **#KeyRequirements** Candidates must demonstrate: Strong understanding of **layout fundamentals.** Hands-on experience in **advanced-node technologies.** Strong problem-solving and debugging skills. Ability to work independently and deliver high-quality layouts. Key Screening Criteria ✅ TSMC/Samsung advanced-node experience (2nm, 3nm, or below ) ✅ Strong Memory Layout or IO Layout expertise. ✅ Sound layout fundamentals and conceptual knowledge. ✅ Relevant experience within the target range (3–8 years). Priority We are looking for **strong technical profiles** with proven advanced-node layout experience, excellent fundamentals, and the ability to contribute immediately to project requirements. **Location:** Bangalore **Employment Type:** Full-Time (FTE) 📧 Interested candidates can share their updated CV for further evaluation at **ss008699368@techmahindra.com** **#Hiring** **#MemoryLayout** **#IOLayout** **#VLSI** **#SemiconductorJobs** **#TSMC** **#SamsungFoundry** **#BangaloreJobs** **#TechMahindra** **#AdvancedNodes** **#LayoutEngineer**