Post Silicon Validation

Job description

**Job Requirements** **Post-Silicon Validation Architect (Display Team)** **Role Overview** The Post-Silicon Validation Architect defines the validation strategy, test plans, and automation frameworks to bring up and qualify next-generation display chips. This role bridges hardware design, FPGA prototyping, and production software to ensure the silicon meets all functional, performance, and reliability targets before mass production. **Key Responsibilities** - Architecture & Strategy: Define the post-silicon validation architecture, methodologies, and test strategies for display chipsets. - Bring-up & Debug: Lead the bring-up of silicon, reference boards, and FPGA prototypes, isolating complex hardware and software defects. - Test Development: Create comprehensive test plans covering display protocols, frame buffer management, pixel pipelines, and image processing algorithms. - Automation: Design and scale automated test frameworks to interface with high-speed validation equipment. - Cross-functional Collaboration: Partner with Design, Pre-Silicon Verification (SV/UVM), Emulation, and Firmware teams to root-cause chip bugs. **Required Technical Skills** **Display, Video, & Pixel Processing** - DSI2 & MIPI: Deep knowledge of MIPI DSI-2 physical and protocol layers for high-speed mobile and automotive displays. - Pixel Formats & Formats: Mastery of raw pixel data formats, including PACKED YUV444 and RGB data streams. - Bit Depth & Color: Expertise in validating variable bit depths (e.g., 8-bit, 10-bit, 12-bit per channel) and their impact on color fidelity. [1] - Scaling & Processing: Strong understanding of image processing pipelines, specifically upscale and downscale filtering engines. - Display Technologies: Deep knowledge of display panels, display drivers, demura (mura correction) algorithms, and color management systems. **Hardware Validation & Equipment** - Introspect Technology: Hands-on experience using Introspect SV series systems (or similar MIPI protocol analyzers/exercisers) for protocol conformance and physical layer testing. - FPGA Prototyping & Emulation: Experience using FPGA platforms (Xilinx/AMD, Intel, or Zebu environments) for pre-silicon development and early post-silicon software alignment. - Lab Instrumentation: Mastery of high-speed oscilloscopes, multimeters, logic analyzers, and bit error rate testers (BERT). **Silicon Characterization & Verification Methodologies** - Bitstream Verification: Experience developing and executing bitstream verification methodologies to validate code compliance and pipeline robustness. - SV/UVM Understanding: Strong understanding of SystemVerilog and UVM (Universal Verification Methodology) to effectively bridge pre-silicon testbenches with post-silicon test plans. - PVT Testing: Experience characterizing silicon performance across Process, Voltage, and Temperature corners. - Frame Buffer: Expertise in validating memory interfaces, frame buffer bandwidth, display refresh rates, and power-saving modes. - Functionality: Full-stack functional validation of chip configuration, register maps, interrupts, and power management states. **Software, OS, & Automation** - Python Programming: Advanced Python programming skills for building, scaling, and maintaining automated test scripts, with tools and frameworks. - Low-Level Software: Experience writing and debugging firmware in baremetal environments and RTOS platforms. - OS Ecosystems: Familiarity with display subsystem pipelines within host operating systems, specifically Android (SurfaceFlinger/HWC) and Linux (DRM/KMS drivers). - Excellent problem-solving abilities and attention to details - Good software debugging skills using tools like gdb, Valgrind etc. - Experience in Continuous Integration tools like SVN, Git, Jira etc. **Soft Skills** - Strong communication skills for clearly communicating ideas and concepts to team/customer **Qualifications** - Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. - Experience: 8+ years of experience in post-silicon validation, specifically within display, multimedia, or high-speed SoC environments.