Principal Engineer - Validation

Job description

**Job Details:** **Role:** Principal Engineer - Validation **Employment Type:** Full Time(Direct Payroll) **Location & Mode:** Hyderabad (Hybrid) **Job Description:** We are seeking a Principal Engineer, Validation with deep technical expertise and strong system-level thinking to architect, lead, and continuously improve post-silicon system and functional validation for complex SoC/MCU platforms. This role is mission-critical to ensuring first-time-right silicon, validating functional correctness, feature compliance, performance, power, and robustness across real-world use cases, PVT corners, and customer workloads. The Principal Engineer acts as a technical authority and trusted advisor, driving validation strategy across pre-silicon, emulation, FPGA, and silicon phases while preventing escapes. **Key Responsibilities:** - Own and define automotive systemlevel postsilicon validation strategy aligned to ASILD quality and zeroescape goals. - Drive prepost silicon continuity, enabling reuse of validation content across simulation, emulation, FPGA, and silicon. - Architect and own end-to-end validation plans, test strategies, and feature-to-coverage matrices mapped to architecture and design specifications - Lead validation of boot, power/clock/reset, safety mechanisms, memory, interconnects, and interfaces under stress, corner, and fault conditions. - Influence SoC architecture and design by identifying validation risks, corner cases, and observability gaps early. - Lead system bringup on automotive evaluation boards, emulation/FPGA platforms, and silicon. - Define requirements for validation infrastructure, lab readiness, instrumentation, and automation frameworks. - Serve as final technical escalation point for complex postsilicon issues; drive disciplined, evidencebased RCA across HW/FW/SW. - Establish escapeprevention mechanisms using coverage proxies, stress scenarios, and datadriven signoff criteria. - Champion automationfirst validation, including regressions, diagnostics, CI integration, and quality metrics. - Own validation readiness assessments, risk reporting, and go/nogo recommendations for production release. - Act as a technical bridge across architecture, design, DV, firmware, software, product, and manufacturing teams - Act as a trusted technical advisor, mentoring engineers and set technical direction and best practices for the validation organization **Qualifications:** **Required Skills & Experience:** - B.E./B. Tech or M.E./M. Tech in Electronics, Electrical, or Computer Engineering. - 14+ years of experience in post-silicon system validation, SoC bring-up, or functional validation, with demonstrated principal-level impact. - Strong expertise in SoC/MCU architecture, ARM cores (A/M series), interconnects, peripherals, power/clock/reset, and low-power design techniques. - Proven experience validating high-speed interfaces (DDR, USB, PCIe, Ethernet, MIPI, etc.) and standard protocols (SPI, I2C, UART, CAN, LIN, FlexRay, etc.). - Advanced proficiency in C/C++ and embedded firmware development for diagnostics, stress, and automation. - Deep hands-on experience with lab instrumentation (oscilloscopes, logic analyzers, power/thermal analyzers). - Strong debug skills using JTAG, Lauterbach, OpenOCD, CoreSight, and related tools. - Demonstrated ability to lead complex cross-functional technical initiatives and influence without authority. - Experience with AI frameworks for SoC Validation efficiency and quality gain eg validation specific AI agents, Cody AI for content development etc. **Preferred:** - Experience in automotive-grade SoCs and familiarity with functional safety, quality, and robustness requirements. - Exposure to emulation, FPGA prototyping, and hybrid validation models. - Track record of escape reduction and quality improvement across silicon generations. - Self-driven, systems thinker with strong analytical, mentoring, and strategic decision-making capabilities. - Experience in validation of (Neural Processing Unit) or AI accelerator HW functionality on SoC.