Senior Engineer - LabVIEW

Job description

**Experience Summary** Three years of professional experience in FPGA and VLSI design, with strong expertise in VHDL/Verilog development, FPGA toolchains, and digital hardware testing. Hands-on experience with Xilinx ISE, Model Sim, and Actel Libero, including testing, troubleshooting of complex digital hardware, and preparation of test plans and test procedures. **Scope of Work** - Preparation and maintenance of Functional Requirement Documents (FRD). - FPGA design, coding, and simulation using VHDL; working knowledge of Verilog is an added advantage. - Development of test benches and functional verification of FPGA designs using Model Sim or equivalent simulators. - FPGA design implementation and execution of required design and timing analyses. - In-system hardware Verification and Validation (V&V) of FPGA code at SRU and LRU levels. - Incorporation of design changes, issue resolution, and design freeze activities. - Technical coordination with Independent Verification & Validation (IV&V) teams to support FPGA design certification. - Generation of detailed design, verification, and analysis documentation. - Preparation of comprehensive technical documentation to support FPGA certification requirements. - Minimum 3 relevant years of work exp in LabVIEW.