Technical Leader: AMS Verification

Job description

**Designation:** Technical Leader: AMS Verification **Location:** Bangalore **Company:** Cyient Semiconductor **Experience:** 10 18 Years *(flexible for strong candidates)* **Hiring Type:** Full-Time **About Cyient Semiconductor** Cyient Semiconductor is a rapidly growing **ASIC/SoC design services company** delivering **end-to-end silicon solutions** across advanced technology nodes for global customers in **automotive, industrial, communication, and high-performance computing domains**. We specialize in **Analog Mixed Signal (AMS), advanced SoC integration, and system-level innovation**. **Role Overview** We are looking for a highly skilled **Technical Leader – Analog Mixed Signal Verification** to lead **verification strategy, execution, and delivery** for complex AMS IPs and SoCs. This role requires deep expertise in **AMS verification methodologies, mixed-signal modeling, and cross-domain validation**, along with the ability to **lead teams, drive customer engagements, and ensure silicon-quality signoff**. **Key Responsibilities** **AMS Verification Strategy & Execution** - Define and drive **end-to-end AMS verification strategy** for complex SoC/IP designs. - Develop and execute **mixed-signal verification plans** for analog/digital integrated systems. - Ensure **functional correctness and coverage closure** across analog and digital domains. **Mixed-Signal Verification & Modeling** - Develop **behavioral models (Verilog-A / SystemVerilog / Real Number Modeling - RNM)**. - Perform **co-simulations (SPICE + digital simulations)** for AMS systems. - Verify key analog blocks including: - PLL, ADC/DAC - Bandgap, LDO, Power Management Circuits - High-speed analog interfaces **Simulation & Debug** - Perform: - **Pre-silicon verification (functional + corner cases)** - **Post-layout verification with analog parasitics** - Debug **mixed-signal interaction issues** (timing, noise, convergence, interface mismatches). **Coverage, Metrics & Signoff** - Define **coverage models for AMS verification**. - Drive **coverage closure and quality metrics**. - Ensure readiness for **tape-out and silicon validation**. **Cross-Functional Collaboration** - Work closely with: - **Analog Designers** (model validation and constraints) - **RTL/Digital Verification teams** - **Physical Design & Signoff teams** - Act as a bridge between **analog and digital domains**. **Leadership & Program Ownership** - Lead and mentor **AMS verification teams**. - Own **project delivery, schedules, and quality milestones**. - Drive **design/verification reviews and stakeholder alignment**. - Interface with **global customers and drive technical discussions**. **Silicon Validation Support** - Support **post-silicon validation and debug**. - Ensure **correlation between simulation and silicon performance**. - Drive improvements for **next silicon iterations**. **Required Skills & Expertise** **Core AMS Verification Expertise** - Strong experience in **Analog Mixed Signal verification (mandatory)**. - Hands-on expertise in: - **Verilog-A / SystemVerilog / RNM modeling** - Mixed-signal simulation methodologies **Verification Tools & Methodologies** - Experience with industry-standard tools: - **Cadence (AMS Designer, Spectre, Xcelium)** - **Synopsys (VCS AMS, CustomSim)** - Siemens EDA tools (Questa ADMS) *(good to have)* - Knowledge of **UVM-based verification with AMS extensions**. **Analog Domain Knowledge** - Strong understanding of analog blocks: - PLL, ADC/DAC, Power Management (LDO, DC-DC) - Understanding of: - Noise, jitter, signal integrity - PVT variations and analog behavior **Advanced Node Exposure** - Experience working on **advanced nodes (16nm / 7nm / 5nm preferred)**. - Understanding of **parasitics, variability, and modeling challenges**. **Preferred Skills** - Experience in **automotive (ISO 26262) functional safety** - Knowledge of **emulation/prototyping environments** - Scripting skills: **Python / Perl / Shell / SKILL** - Exposure to **high-speed protocols or SoC-level integration** **Leadership & Soft Skills** - Strong **technical leadership & mentoring ability** - Excellent **problem-solving and debugging skills** - Proven capability to **lead cross-functional teams** - Strong **communication and stakeholder management** - Experience in **customer-facing roles** **Educational Qualification** - B.E / B.Tech / M.E / M.Tech in **Electronics / Electrical / VLSI / Microelectronics** **Why Join Cyient Semiconductor?** - Work on **complex AMS SoCs and advanced node technologies** - Opportunity to lead **high-impact global programs** - Exposure to **end-to-end chip development lifecycle** - Strong **technical leadership growth path** - Collaborative and innovation-driven engineering culture **How to Apply** If you have strong expertise in **AMS verification and are ready to lead next-gen SoC programs**, share your updated CV at: **Rajanikant.Sharma@cyientsemi.com**