AMS Verification engineer
Cyient · Hyderabad, Telangana, India
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Cyient · Hyderabad, Telangana, India
Required Skills & Qualifications • Bachelor's/Master's degree in Electronics & Communication Engineering, Electrical Engineering, or related field. • 3-5 years of experience in AMS Verification. • Strong understanding of Analog Mixed-Signal design and verification concepts. • Hands-on experience with: • SystemVerilog • UVM • Verilog-AMS / Verilog-A • Mixed-signal verification methodologies • Experience with simulators such as: • Cadence Xcelium • Cadence AMS Designer • Synopsys VCS AMS • Siemens Questa ADMS • Strong debugging and problem-solving skills. • Experience in scripting using Python, Perl, Shell, or TCL. • Good understanding of assertions, coverage concepts, and regression management. Preferred Skills • Experience in verifying high-speed interfaces, ADC/DACs, PLLs, SerDes, PMICs, or Sensor IPs. • Familiarity with real-number modeling (RNM). • Knowledge of AMS verification acceleration techniques. • Experience with SoC-level integration and verification. • Understanding of low-power verification concepts. Location: Hyderabad Experience: 3-6 Years Notice Period: Immediate to 30 Days Preferred Roles and Responsibilities • Bachelor's/Master's degree in Electronics & Communication Engineering, Electrical Engineering, or related field. • 3-5 years of experience in AMS Verification. • Strong understanding of Analog Mixed-Signal design and verification concepts. • Hands-on experience with: